| PART |
Description |
Maker |
| MC100LVEL29DWR2 |
3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 100LVEL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20
|
ON Semiconductor
|
| 5962F9863501VXC 5962F9863501VCC 5962F9863501V9A AC |
3-line to 8-line decoder / demultiplexer 16-SOIC 0 to 70
Contact Protector; Weight:163g
Radiation Hardened Quad D-Type Flip-Flop
with Reset(抗辐射四D触发器（带复位功能）)
Radiation Hardened Quad D-Type Flip- Flop with Reset AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Quad D-Type Flip- Flop with Reset AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC16
Radiation Hardened Quad D-Type Flip- Flop with Reset
|
Intersil Corporation
Intersil, Corp.
|
| 74HC74DR2 74HC74DR2G 74HC74D 74HC74 74HC74DTR2G 74 |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
Dual D Flip-Flop with Set and Reset(带设置和复位的双D触发 双D触发器的设置和复位（带设置和复位的双触发器）
|
ONSEMI[ON Semiconductor]
|
| MC74HC273AN MC74HC273ADTR2 MC74HC273ADT MC74HC273 |
Octal D-Type Flip-Flop
OCTAL D FLIP FLOP WITH COMMON CLOCK AND RESET HC/UH SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20
|
ON Semiconductor
ONSEMI
|
| 74ALS109AN 74ALS109A 74ALS109AD |
Dual J-K positive edge-triggered flip-flop with set and reset ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
|
Rochester Electronics, LLC
PHILIPS[Philips Semiconductors]
NXP Semiconductors
|
| MC100EP16VA MC100EP17 MC100EP29 MC100EP35 MC100EP4 |
3.3V / 5V ECL Differential Receiver/Driver with High Gain
3.3V / 5V ECL Quad Differential Driver/Receiver
3.3V / 5V ECL Dual Differential Data and Clock D Flip?Flop With Set and Reset
3.3V / 5V ECL JK Flip?Flop
3.3V/5V ECL 8?Bit Serial/Parallel Converter
3.3V / 5V ECL Differential Data and Clock D Flip?Flop
3.3V / 5V ECL 4:1 Differential Multiplexer
3.3V / 5V ECL 2:1 Multiplexer
9?Bit TTL to ECL Translator
3.3V / 5V ECL 8?Bit Synchronous Binary Up Counter
3.3V / 5V ECL 2?Input Differential AND/NAND
3.3V / 5V ECL Quad 4?Input OR/NOR
3.3V / 5V ECL Quad 2?Input Differential AND/NAND
3.3 V / 5 V Hex Differential Line Receiver/Driver
3.3V / 5V ECL 1:2 Differential Fanout Buffer
3.3V / 5V ECL 卤2/4, 卤4/5/6 Clock Generation Chip
3.3V / 5V ECL Differential Receiver/Driver with Internal Termination
3.3V ECL Programmable Delay Chip
3.3V / 5V ECL D Flip?Flop with Set and Reset
3.3V / 5V ECL 卤2 Divider
3.3V / 5V ECL 卤4 Divider
3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter
3.3V / 5V ECL 6?Bit Differential Register with Master Reset
3.3V / 5V ECL D Flip?Flop with Reset and Differential Clock
3.3V / 5V ECL Dual Differential 2:1 Multiplexer
3.3V / 5V ECL Coaxial Cable Driver
?3.3V / ?5V Triple ECL Input to LVPECL/PECL Output Translator
3.3V LVTTL/LVCMOS to Differential LVPECL Translator
|
ONSEMI[ON Semiconductor]
|
| IN74HCT109 |
DUAL J-K FLIP-FLOP WITH SET AND RESET
|
INTEGRAL[Integral Corp.]
|
| MC74HC112 MC74HC112-13 |
Dual J-K Flip-Flop with Set and Reset
|
ON Semiconductor
|
| IN74VHCT74N IN74VHCT74 IN74VHCT74D |
Dual D Flip-Flop with Set and Reset
|
INTEGRAL[Integral Corp.]
|
| MC74HC74A |
Dual D Flip-Flop with Set and Reset
|
Motorola
|
| MC74HC73 MC74HC73D MC74HC73N ON1494 |
From old datasheet system
Dual J-K Flip-Flop with Reset
|
MOTOROLA[Motorola, Inc]
ON Semi
|
